1. Field of the Invention
The present invention relates to a reticle for use in a reduction exposure apparatus used in manufacturing semiconductor devices.
2. Description of Related Art
Manufacturing steps of a semiconductor device includes an exposing step for forming a plurality of circuit patterns on a semiconductor wafer. In the exposing step, a reduction exposure apparatus is generally used to project a pattern formed on a reticle with a certain reduction rate onto a wafer and to expose the latter with the reduced pattern. That is, the reticle bearing a circuit pattern enlarged by n times (where n is usually 5 to 10) is disposed below a light source of the reduction exposure device which further includes a reduction lens disposed below the reticle. A wafer is set on an X-Y stage arranged below the reduction lens. A photoresist film is formed on a surface of the water. Light from the light source passes through the reticle and an image of the circuit pattern on the reticle is reduced by the reduction lens to 1/n and is projected and focused on the photoresist film of the wafer to expose the latter.
It is known that an area of the photoresist film which can be exposed by one exposing operation is usually from 5 mm (millimeters) square to 20 mm square. Since a diameter of the wafer may be from 100 to 200 mm, it is impossible to expose the whole area of the wafer at once. Therefore, the so-called step-and-repeat method is used for the exposure of the whole wafer surface. Different areas of the wafer surface are successively exposed to the same circuit pattern while moving the X-Y stage. After the whole surface of the wafer is exposed in this manner, the photoresist film on the wafer is developed. Then, a first circuit pattern is formed on the wafer by means of chemical and/or physical processings such as etching and diffusion of impurity. After this process, a second photoresist is formed on the wafer which is exposed with another circuit pattern provided on another reticle in the same manner as that of the first exposure.
This exposing process using such reduction exposure apparatus requires a technique for precisely projecting identical patterns on different areas of a wafer and a technique for exactly overlapping other circuit patterns on the previously formed circuit patterns.
Errors which may be generated in overlapping these patterns may be classified into an in-field error caused during a reduction exposure and an alignment error caused by misalignment between previous projections of one circuit pattern onto a wafer and current projections of another circuit pattern thereonto.
The in-field error includes distortion error generated by a reticle rotation caused by an alignment mechanism when the reticle is set on an exposure device and an aberration of an optical system, and by a simple error in lens magnification.
In a lithographic step, it is necessary to make the overlapping error as small as possible. In order to make such error small, it is necessary to independently measure the in-field error and the other errors included in the overlapping error.
The measurement of the overlapping error has been performed by using a plurality of measuring patterns formed in arbitrary portions of pattern forming areas of the respective reticles which are used in a preceding exposure and in the current exposure, respectively. That is, coordinations of positions of the respective measuring patterns are defined exactly. The overlapping error is obtained by measuring relative positions of the measuring patterns formed in the preceding step and the measuring patterns in the form of photoresist patterns formed in the current step, at a plurality of locations within the same exposure area on the wafer. However, in the measurement of the relative positions of the measuring patterns formed on the wafer in the preceding step and the current step, measured overlapping error may include a pattern overlapping error and an X-Y stage error, etc., in addition to the reticle rotation error, the magnification error of the optical system and the distortion error.
Therefore, since the in-field error can be measured as merely a relative position in the preceding and current steps, it has been impossible to obtain the in-field error with respect to an ideal position in every step. The X-Y stage error may be measured by other methods and can be made as small as 0.02 .mu.m (micrometers) or less.
Further, for a pattern in the form of photoresist film on a wafer on which no circuit pattern is formed yet, the in-field error can not be measured since there is no reference pattern, i.e., a pattern used in a preceding step, on which a relative position is to be measured.